99 台大電機丙 計算機結構與作業系統 第6題

Suppose we have a deeply pipelined processor, for which we implement a branch target buffer for the conditional branches, which are 15% of the instructions. Assume that the misprediction penalty is always 3 cycles and the buffer miss penalty is always 6 cycles. Assume 90% hit rate in the buffer and 75% accuracy of the buffer prediction. Assume a base CPI without branch stall is 1. Why is the CPI?

A. 1
B. 1.09
C. 1.19
D. 1.675
E. None of the above

Answer: C

兩種答案：
1: 1 + 0.15 ( 0.1*6 + 0.9*0.25*3 ) = 1.19125 （張帆）
2: 1 + 0.15 ( 0.25*3 + 0.75*0.1*6 ) = 1.18

https://i.imgur.com/GWItF8W.jpg